# Freescale TSEC / eTSEC - emllETSEC

The parameters to the Real-time Ethernet Driver ETSEC are setup-specific. The function `CreateLinkParmsFromCmdLineETSEC()` in [`EcSelectLinkLayer.cpp`](_downloads/bf62c71a4a7e317930818b9da4a9815c/EcSelectLinkLayer.cpp) demonstrates how to initialize the Real-time Ethernet Driver instance.

### struct EC_T_LINK_PARMS_ETSEC

### Public Members

### [EC_T_LINK_PARMS](emll_init.html.md#_CPPv415EC_T_LINK_PARMS) linkParms

Common link parameters. Signature must be set to EC_LINK_PARMS_SIGNATURE_ETSEC. 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwRegisterBase

Physical base address of register block (4k) 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwLocalMdioBase

Physical base address of local MDIO register block (4k). For the eTSEC V1 or TSEC this is the same as dwRegisterBase, for the eTSEC V2 it’s not. 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwPhyMdioBase

Physical base address of MDIO register block (4k). This is the MDIO base of the (e)TSEC where the PHY (MII bus) is physically connected to (MII interface is shared by (e)TSEC’s). 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwPhyAddr

PHY address on MII bus. ETSEC_FIXED_LINK if fixed link configuration. 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwTbiPhyAddr

Address of internal TBI PHY. Any address from [0..31] can be used here, but the address shouldn’t collide with any external PHY connected to the external MII bus. 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwFixedLinkVal

Only evaluated if dwPhyAddr == FIXED_LINK. Set to one of the ETSEC_LINKFLAG_\* macros. I.e. ETSEC_LINKFLAG_1000baseT_Full. 

### [EC_T_BYTE](toc_api.html.md#_CPPv49EC_T_BYTE) abyStationAddress[6]

MAC address 

### EC_T_VOID \*oMiiBusMtx

This mutex protects the access to the (shared) MII bus. Set to 0 if mutex shouldn’t be used. The MII bus is shared between eTSEC instances. So this mutex should be created once and assigned here for all Linklayer instances. 

### [EC_T_DWORD](toc_api.html.md#_CPPv410EC_T_DWORD) dwRxInterrupt

Receive interrupt number (IRQ) 

### [EC_T_BOOL](toc_api.html.md#_CPPv49EC_T_BOOL) bNotUseDmaBuffers

EC_FALSE: Use buffers from DMA for receive (default), EC_TRUE: use buffers from heap for receive. EcLinkAllocSendFrame is not supported if bNotUseDmaBuffers = EC_TRUE. 

### [EC_T_ETSEC_TYPE](#_CPPv415EC_T_ETSEC_TYPE) eETSECType

System on Chip type 

### [EC_T_BOOL](toc_api.html.md#_CPPv49EC_T_BOOL) bMaster

Full control over the MAC and need to initialize MAC and the connections to the PHYs 

### enum EC_T_ETSEC_TYPE

*Values:*

### enumerator eETSEC_P2020RDB

MAC on Freescale P2020 

### enumerator eETSEC_TWRP1025

MAC on Freescale TWRP1025 

### enumerator eETSEC_ISTMPC8548

MAC on Freescale ISTMPC8548 

### enumerator eETSEC_XJ_EPU20C

MAC on Freescale XJ EPU20C 

### enumerator eETSEC_TWRLS1021A

MAC on Freescale TWRLS1021A 

### enumerator eETSEC_TQMLS_LS102XA

MAC on Freescale TQMLS LS102XA 

## ETSEC supported MAC’s

- TSEC (not tested): Legacy hardware. Should be supported, because eTSEC is compatible to TSEC if the enhanced functionality is not used.
- eTSEC v1 (tested): This chip is used for QorIQ (i.e. P2020E) and PowerQUICC devices  (i.e. MPC8548). It has 4k of IO memory.
- eETSEC v2, also called vETSEC, v read as “virtualization” (tested): This chip is used for newer QorIQ devices (i.e. P1020). It has 12k of IO memory (4k MDIO, 4k Register group0, 4k Register group1)

## Shared MII bus

The driver will access the Ethernet PHY for the following reasons:

- Check for link (or timeout), if the driver instance is opened.
- Configure MAC according to the auto-negotiated PHY speed (mandatory).
- Check link (and reconfigure MAC) during cyclic run. Therefore `EC_LINKIOCTL_UPDATE_LINKSTATUS` should not be called explicitly in parallel!

#### NOTE
The external PHYs are connected physically to the MII bus of the first eTSEC (and/or eTSEC3, depending on SoC type). From SoC reference manuals:
“14.5.3.6.6 MII Management Configuration Register (MIIMCFG)
… Note that MII management hardware is shared by all eTSECs. Thus, only through the MIIM registers of eTSEC1 can external PHYs be accessed and configured.”

That means that the acontis TSEC / eTSEC driver will also mmap the register set of the corresponding eTSEC. The following initialization parameters are used to specify the MII settings:

1. Memory map of eTSEC which will manage the MII bus (connection of external PHY’s):

```cpp
poDrvSpecificParam->dwPhyMdioBase = dwCcsrbar + 0x24000;
```

1. Dummy address assigned to internal TBI PHY. Use any address (from 0 .. 31)
   which will not collide with any of the physical PHY’s addresses:

```cpp
poDrvSpecificParam->dwTbiPhyAddr = 16;
```

## Locking

The optional lock is acquired each time the MDIO register (specified by poDrvSpecificParam->dwPhyMdioBase) are accessed:

```cpp
poDrvSpecificParam->oMiiBusMtx = EC_NULL;

/* implement locking by using return value of LinkOsCreateLock(eLockType_DEFAULT); */
```

## Link check

The driver’s API function EcLinkGetStatus (pfEcLinkGetStatus) is called by the EC-Master stack. On eTSEC the link status can’t be obtained directly by reading eTSEC registers without access to the MII bus (Use mutex, poll for completion). Accessing the bus would violate timing constraints and is therefore not possible.

The following IOCTL updates the link status and accesses the PHY. The IOCTL is blocking and may therefore not be called from the JobTask’s context.
I.e. use:

```cpp
dwRes = emIoCtl(( EC_IOCTL_LINKLAYER | EC_LINKIOCTL_UPDATE_LINKSTATUS), EC_NULL);
```

EcLinkGetStatus always returns the last known link status.

## Fixed Link

PHY access can be effectively disabled entirely to avoid concurrent access if link speed and mode are defined to be fixed. This functionality is mainly provided for L2-Switch-IC’s like Vertesse VSC7385 which haven’t any PHY and are attached to the eTSEC MAC with fixed speed and mode.

The driver’s open function will not wait until the link is up on EC-Master start up. Auto-negotiation of the following PHYs is not affected by this parameter and still active. There is no forced link and no PHY access at all.

Parameters for fixed link:

```cpp
pETSECParam->dwPhyAddr      = ETSEC_FIXED_LINK;
pETSECParam->dwFixedLinkVal = ETSEC_LINKFLAG_1000baseT_Full | ETSEC_LINKFLAG_LINKOK;
```