# Freescale FslFec - emllFslFec

The parameters to the Real-time Ethernet Driver FslFec are setup-specific. The function `CreateLinkParmsFromCmdLineFslFec()` in [`EcSelectLinkLayer.cpp`](_downloads/bf62c71a4a7e317930818b9da4a9815c/EcSelectLinkLayer.cpp) demonstrates how to initialize the Real-time Ethernet Driver instance.

### struct EC_T_LINK_PARMS_FSLFEC

### Public Members

### [EC_T_LINK_PARMS](emll_init.html.md#_CPPv415EC_T_LINK_PARMS) linkParms

Common link parameters. Signature must be set to EC_LINK_PARMS_SIGNATURE_FSLFEC 

### [EC_T_DWORD](api.html.md#_CPPv410EC_T_DWORD) dwRxBuffers

Receive buffer count 

### [EC_T_DWORD](api.html.md#_CPPv410EC_T_DWORD) dwTxBuffers

Transmit buffer count 

### [EC_T_FEC_TYPE](#_CPPv413EC_T_FEC_TYPE) eFecType

System on Chip type 

### [EC_T_PHYINTERFACE](emll_init.html.md#_CPPv417EC_T_PHYINTERFACE) ePhyInterface

PHY interface type 

### [EC_T_BOOL](api.html.md#_CPPv49EC_T_BOOL) bUseDmaBuffers

Use buffers from DMA (EC_TRUE) or from heap for receive and AllocSend not supported (EC_FALSE) 

### [EC_T_DWORD](api.html.md#_CPPv410EC_T_DWORD) dwPhyAddr

PHY Address 

### [EC_T_BOOL](api.html.md#_CPPv49EC_T_BOOL) bNoPinMuxing

No clock configuration and pin muxing 

### [EC_T_BOOL](api.html.md#_CPPv49EC_T_BOOL) bDontReadMacAddr

Read of MAC address disabled 

### [EC_T_DWORD](api.html.md#_CPPv410EC_T_DWORD) dwRxInterrupt

Receive interrupt number (IRQ) 

### [EC_T_BOOL](api.html.md#_CPPv49EC_T_BOOL) bNoPhyAccess

EC_FALSE: Link layer should initialize PHY and read link status (connected/disconnected). EC_TRUE: Client is responsible of PHY initialization and clock initialization 

### [EC_T_BOOL](api.html.md#_CPPv49EC_T_BOOL) bFlushFramesRequired

EC_FALSE: flush cyclic / acyclic frames queued at link layer 

### enum EC_T_FEC_TYPE

*Values:*

### enumerator eFEC_IMX25

MAC on Freescale i.MX25 (ARM9; ARMv5) 

### enumerator eFEC_IMX28

MAC on Freescale i.MX28 (ARM9; ARMv5) 

### enumerator eFEC_IMX53

MAC on Freescale i.MX53 (ARM Cortex-A8; ARMv7-a) 

### enumerator eFEC_IMX6

MAC on Freescale i.MX6 (ARM Cortex-A9 Single/Dual/Quad; ARMv7-a) 

### enumerator eFEC_VF6

MAC on Freescale VYBRID VF6xx (ARM Cortex-A5 + Cortex-M4) 

### enumerator eFEC_IMX7

MAC on Freescale i.MX7 (ARM Cortex-A9 Single/Dual/Quad; ARMv7-a) 

### enumerator eFEC_IMX8

MAC on Freescale i.MX8 (ARM Cortex-A72/A53 Single/Dual/Quad; ARMv8-a) 

### enumerator eFEC_IMX8M

MAC on Freescale i.MX8M Mini/Nano/Plus (ARM Cortex-A53 Single/Dual/Quad; ARMv8-a) 

### enumerator eFEC_IMXRT1064

MAC on NXP i.MX RT 1064 (ARM Cortex-M7 ) 

### enumerator eFEC_IMX9

MAC on NXP i.MX93 (ARM Cortex-A55/M33 Single/Dual) 

### enumerator eFEC_IMX8MP

MAC on NXP i.MX8MPLUS