The parameters to the ETSEC Link Layer are setup-specific. The function “CreateLinkParmsFromCmdLineETSEC” in EcSelectLinkLayer.cpp demonstrates how to initialize the Link Layer instance.
Common link parameters. Signature must be set to EC_LINK_PARMS_SIGNATURE_ETSEC
Physical base address of local MDIO register block (4k). For the eTSEC V1 or TSEC this is the same as dwRegisterBase, for the eTSEC V2 it’s not.
Physical base address of MDIO register block (4k). This is the MDIO base of the (e)TSEC where the PHY (MII bus) is physically connected to (MII interface is shared by (e)TSEC’s).
Address of internal TBI phy. Any address from [0..31] can be used here, but the address shouldn’t collide with any external PHY connected to the external MII bus
Only evaluated if dwPhyAddr == FIXED_LINK. Set to one of the ETSEC_LINKFLAG_* macros. I.e. ETSEC_LINKFLAG_1000baseT_Full
This mutex protect the access to the (shared) MII bus. Set to 0 if mutex shouldn’t be used. The MII bus is shared between eTSEC instances. So this mutex should be created once and assigned here for all Linklayer instances
EC_TRUE: copy buffer before processing, EC_FALSE: Use buffers from DMA (default)
System on Chip type
TSEC (not tested): Legacy hardware. Should be supported, because eTSEC is compatible to TSEC if the enhanced functionality is not used.
eTSEC v1 (tested): This chip is used for QorIQ (i.e. P2020E) and PowerQUICC devices (i.e. MPC8548). It has 4k of IO memory.
eETSEC v2, also called vETSEC, v read as “virtualization” (tested): This chip is used for newer QorIQ devices (i.e. P1020). It has 12k of IO memory (4k MDIO, 4k Register group0, 4k Register group1)
The optional lock is acquired each time the MDIO register (specified by poDrvSpecificParam->dwPhyMdioBase) are accessed:
poDrvSpecificParam->oMiiBusMtx = EC_NULL; /* implement locking by using return value of LinkOsCreateLock(eLockType_DEFAULT); */